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Harris

Zum Entwickeln und Testen der Aufgaben stellen wir den Server harris zur Verfügung. 
 
Server: harris.cs.univie.ac.at 
CPUs: 4 Socket - 12 Core AMD Opteron(tm) Processor 6174 
Speicher: 256GB 
Betriebsystem: Linux/Ubuntu 16.04.01 LTS 

Zugriff

via SSH/SCP/SFTP 
 
Account: aMatrikelnummer 
Passwort: wird via E-Mail zugesendet 

Software und Programmierumgebungen

PAPI

/usr/include/papi.h
/usr/lib/x86_64-linux-gnu/libpapi.a

ATLAS BLAS

/usr/lib/atlas/cblas.h
/usr/lib/libatlas.a

OpenBLAS

/usr/lib/openblas/cblas.h
/usr/lib/libopenblas.a

LAPACK

/usr/lib/liblapack.a

gcc C/C++/Fortran

gcc version 5.4.0 20160609

Octave

/usr/lib/x86_64-linux-gnu/octave
 

Details

CPUs

Architecture:          x86_64
CPU op-mode(s):        32-bit, 64-bit
Byte Order:            Little Endian
CPU(s):                48
On-line CPU(s) list:   0-47
Thread(s) per core:    1
Core(s) per socket:    12
Socket(s):             4
NUMA node(s):          8
Vendor ID:             AuthenticAMD
CPU family:            16
Model:                 9
Model name:            AMD Opteron(tm) Processor 6174
Stepping:              1
CPU MHz:               800.000
CPU max MHz:           2200.0000
CPU min MHz:           800.0000
BogoMIPS:              4402.21
Virtualization:        AMD-V
L1d cache:             64K
L1i cache:             64K
L2 cache:              512K
L3 cache:              5118K
NUMA node0 CPU(s):     0-5
NUMA node1 CPU(s):     6-11
NUMA node2 CPU(s):     12-17
NUMA node3 CPU(s):     18-23
NUMA node4 CPU(s):     24-29
NUMA node5 CPU(s):     30-35
NUMA node6 CPU(s):     36-41
NUMA node7 CPU(s):     42-47
Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid amd_dcm pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
 
 
processor       : 0
vendor_id       : AuthenticAMD
cpu family      : 16
model           : 9
model name      : AMD Opteron(tm) Processor 6174
stepping        : 1
microcode       : 0x10000c4
cpu MHz         : 800.000
cache size      : 512 KB
physical id     : 0
siblings        : 12
core id         : 0
cpu cores       : 12
apicid          : 16
initial apicid  : 0
fpu             : yes
fpu_exception   : yes
cpuid level     : 5
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid amd_dcm pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs            : tlb_mmatch fxsave_leak sysret_ss_attrs
bogomips        : 4400.09
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate
 
 
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
   instruction # entries     = 0x10 (16)
   instruction associativity = 0xff (255)
   data # entries            = 0x30 (48)
   data associativity        = 0xff (255)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
   instruction # entries     = 0x20 (32)
   instruction associativity = 0xff (255)
   data # entries            = 0x30 (48)
   data associativity        = 0xff (255)
L1 data cache information (0x80000005/ecx):
   line size (bytes) = 0x40 (64)
   lines per tag     = 0x1 (1)
   associativity     = 0x2 (2)
   size (Kb)         = 0x40 (64)
L1 instruction cache information (0x80000005/edx):
   line size (bytes) = 0x40 (64)
   lines per tag     = 0x1 (1)
   associativity     = 0x2 (2)
   size (Kb)         = 0x40 (64)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
   instruction # entries     = 0x0 (0)
   instruction associativity = L2 off (0)
   data # entries            = 0x80 (128)
   data associativity        = 2-way (2)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
   instruction # entries     = 0x200 (512)
   instruction associativity = 4-way (4)
   data # entries            = 0x200 (512)
   data associativity        = 4-way (4)
L2 unified cache information (0x80000006/ecx):
   line size (bytes) = 0x40 (64)
   lines per tag     = 0x1 (1)
   associativity     = 16-way (8)
   size (Kb)         = 0x200 (512)
L3 cache information (0x80000006/edx):
   line size (bytes)     = 0x40 (64)
   lines per tag         = 0x1 (1)
   associativity         = 96-way (13)
   size (in 512Kb units) = 0x14 (20)
Letzte Änderung: 08.11.2021, 12:38 | 565 Worte